Company on a Chip
Disclaimer: This is a fictional story, inspired by the Apple M1 “System on Chip” announcement. It is part of an effort to reveal the Transifex way of working and how the company is structured and operates, in a funny and amusing way. “System on Chip” is a circuit that integrates all the components of a computer. Using this as a metaphor, the article tries to visualize how the Transifex company could be architected and work as an integrated computer.
TX1 is here, the first chip designed exclusively to empower small to medium businesses, with superior performance in terms of revenue per employee.
It incorporates all the elements required for a business to operate, an entire company on a single chip, using the GEM instruction set (Growth – Engagement – Monetization), known for its optimal performance in the Agile development space. One of a kind, it is capable of transforming market requirements and product value into high customer impact and measurable income for its stakeholders and employees.
The chip consists of a general purpose CPU, a set of co-processor units and various controllers that are presented in detail below.
Table of Contents
The Leadership chip
The Leadership chip (LD-5623) is a general purpose computing unit capable of solving high level problems, taking global decisions or setting the direction of the entire system, using the OKR communication protocol.
The chip is weak on solving complex computational problems, thus the load in that case is redirected to special processing units, the TX1 co-processors.
The Engineering co-processor uses four computational cores (ENG-ZINO, ENG-GLUON, ENG-PHOTON and ENG-CHAMELEON), capable of solving development tasks via a high throughput pipeline, at four parallel tasks per clock cycle.
The Engineering co-processor is excellent at transforming user requirements and design documents into product features, while maintaining service uptime and scalability with minimal supervision from the Leadership chip.
The Product co-processor (P-495820) implements an instruction set capable of crunching data from market research, competition analysis, user interviews and leadership strategic initiatives, transforming them into short, medium and long term roadmap items, sorted by value.
Located next to the Engineering co-processor to avoid circuit delays, P-495820 constantly feeds the development pipeline with tasks, keeping the cores busy.
Customer Success co-processor
The Customer Success co-processor (CS-5930-34) is a network chip, focusing on solving tasks related to customer interactions, such as support, workflow improvements, troubleshooting, subscription renewals and customer churn management. It is also responsible for managing user documentation and support pages.
Demand Gen co-processor
The Demand Gen co-processor (DG-32-PP) is responsible for creating leads for the system via marketing campaigns, thought leadership content, SEO optimization, A/B testing and analytics reports. It empowers the self-serve model of the system and continuously monitors and improves the user onboarding funnel.
The Sales co-processor (S-9826-3) is one of the most critical chipsets of the platform, with network operations focusing on talking with potential prospects, running demos and converting trials to paid customers.
The Finance co-processor (FIN-982309) is responsible for managing the cash flow of the system, by keeping operating expenses on track, unblocking investment opportunities and requests from other subsystems, and forecasting for future financial needs.
The Service chips is a cluster of units (AWS-EUW1) that serve the company value to the customers. They implement circuits responsible for customer data storage (RAM), user interactions and interfaces.
The Service chips are managed by the Engineering co-processor via a direct and dedicated communication bus.
The PeopleOps chip (PO-74) is the main source of power. The entire system is powered by its people and PO-74 is connecting the subsystems with an external talent pool, ensuring sufficient people energy flowing through the entire company circuit.
It is also responsible for maintaining a great company culture and the well-being of the current employee powerforce.
The VC auxiliary chip is an optional stand-by source of power that feeds the system with cash flow energy in case of emergency or when the company has decided to make an important investment and needs extra resources to boost up it’s operations.
The Probe controller chip (M-365) connects the system with the external market and powers up the Demand-gen, Sales and Product chips with important information and data from the outside world, through competition analysis, customer interviews, and industry research.
Board of Directors controller
The BoD controller is a special security chip connected with the Leadership main processing unit, acting as a test controller by evaluating the decisions made, sharing advice or intervening in cases of crysis. It operates on quarterly cycles.
The Bus controller (RW-365) is the chipset responsible for the entire communication of the system. It operates using Remote Working protocols and connects all subsystems together using synchronous or asynchronous data flows.
TX1 has licensed some third party chips such as Slack (SLK-342), Google (G-23-2) and Atlassian (ATL-92) to empower the controller with extra storage and more communication features. Examples of bus operations are: management of tasks in Jira, async communication in Slack or Gmail, synchronous communication via Google Meet etc.
Failure on the bus controller can cause collapse of the entire system, as individual units will fail to operate in harmony and in collaboration, creating havoc and circuit breakdown.
So what’s next? TX1 has been tested in production use and works great so far. Hopefully, in a year from now, we will be able to release TX2 by trying out new things, experimenting, following best practices and innovating on new components.